Not many PCI devices can support random reads in fewer than four to five
clock cycles. A core memory board would just take more cycles. So what?
Because what would the point be for a pc with core and an access time of
1000 to 10,000ns per byte/word? not mentioning the array if hand made
with logic and read amps would likely be bigger than the mother board.
Windows would likely go belly up with memory delays like that. Of course
the array would ahve to be howmany bits wide to support PCI?
It's not like you're going to be able to run
an operating system out of it
on *any* machine, modern or classic.
Nor out of 4k in a PDP-8 according to some.
However with 256Words of core working building a simple TTL machine around
it would be of some educational value. It is however snough space to run
practical demonstration programs.
Allison