The problems revolve around the fact that instructions
cannot be
properly restarted on the 68000. Not enough context is saved.
[...]
(The tricks done by those who did fix this consists of having a
second processor which gets interrupted when you get a page fault,
and the second processor do all the work related to the page fault,
while the primary processor just stalls until the memory is
available, at which point it can continue. There is no limits to how
long the CPU can wait for memory to return data on a read.)
I recall hearing of a company that build a machine with two 68000s, one
running one instruction behind the other. When the leading processor
got a page fault, hardware interrupted the lagging processor (which had
not yet encountered the faulting instruction) and there's a dance where
the two processors switch roles, allowing useful page faults.
Perhaps such a thing existed. Perhaps my informant was misled - it
sounds like a plausible corruption of what you describe. Perhaps my
own memory has bitrotted. But it sounds to me as though it certainly
_could_ work.
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