Making vintage computers

________________________________________ From: cctalk-bounces at classiccmp.org [cctalk-bounces at classiccmp.org] On Behalf Of Alexandru Lovin [thypope at gmail.com] Sent: Wednesday, May 27, 2009 6:25 PM To: General Discussion: On-Topic and Off-Topic Posts Subject: Re: Making vintage computers [snip] Oh God, thank you for my expert friend from Australia! Yes, Sir, he told me how. Basically the 286 would use hardware expanded memory as the link within a cluster of sixteen motherboards (out of which fifteen are identical, just the CPU, RAM and chipset as far as I understood it, the last one having all the other chips - graphics, sound, etc.) and the cluster would work as a single, multi-CPU computer. Now, when it comes to the 386 and onwards, these can address 4 GB of RAM. I wouldn't put 16 mobos in one cluster with each of them having 4 GB of RAM. Instead, the northbridge would probably be connected to a custom bus syncing all the CPUs. Something along the lines of HyperThreading, which he said is something similar to non uniform memory addressing. The point is, use the same amount of RAM for all the CPUs. Like the difference between regular multi-CPU systems and regular multi-core CPU systems. You probably know multi-CPU systems have their memory "per-CPU" while the cores inside a multi-core CPU all use the same system RAM. Sorry, hyperthreading (aka SMT) is NOTHING like non-uniform memory addressing (NUMA). Hyperthreading is an architecture where additional program counters and registers can access the same functional units (e.g. ALU) to exploit thread-level parallelism, while the traditional superscalar architecture exploits instruction-level parallelism. With the architecture you describe, it seems like a cache-coherent NUMA. BTW, multi-CPU vs. multicore isn't that much different, except that it's less hardware for multicore systems to share the memory interface - each one has its own cache, with traditional protocols to avoid sequential incoherency (i.e. a different result from multiple CPUs processing an instruction stream as opposed to one CPU). -- Ian