12 Dec
2008
12 Dec
'08
8:29 p.m.
On 12 Dec 2008 at 10:47, bfranchuk at jetnet.ab.ca wrote:
Most of the FPGA designs I have seen are RISC's
or some 6502 offshoot.
I am sticking for now to CPLD's, since you don't have to configure the chip
like a FPGA, Also a little cheaper if you stick to a bare design like a
PDP8.
Two CPLD's for the data path and 1 CPLD for control.
How about a 20-bit word size, 4 bit opcode, 65KW addressing space,
simple one-address+accumulator machine? Enough directly-addressable
memory to do just about whatever you need to do, simple to implement.
Cheers,
Chuck