20 Aug
2001
20 Aug
'01
2:11 p.m.
Tony Duell skrev:
> I take it you're no big fan of load/store
designs?
Actually, load/store architectures do tend to have a
large number of
internal CPU registers, and those registers tend to be general-purpose.
Which means I have no real problem with them.
There must be two load/store designs, then; those which rely on fast memory
access, and those which don't, yet rely upon it and compensate through a large
number of registers. The 6502 would belong to the first case.
> >Eh? Yes, there are some special-cases on the
6809 (MUL, for example). But
> >the 6502 has many more. Heck, on the 6502 you have to use the X register
> >for one kind of indrect and indexed addressing and the Y register for the
> >other form (on the 6809 you can do any addressing mode with X or Y (or
> >with U or S for that matter). On the 6809 you can transfer values between
> >any 2 registers of the same size. On the 6502 you can't even transfer
> >between X and Y without destroying the accumulator contents (IIRC).
>
> I was specifically thinking of all the different registers and the way you
> combine them. But I've not got enough experience to make any insightful
> comparisons.
If we ignore the registers which are likely to be
'special' on any real
processor (PC and flags, for example), then IIRC, the 6809 has the
following registers :
A, B (Accumulators, can be considered to be the 16 bit
D register)
X,Y (Index registers)
U,S (Stack pointers)
DP (Direct Page pointer).
[snip]
But in general, U and S are equivalent. So are X and Y.
And in some
cases, even all of X, Y, U, S can be used in the same way. For a
processor with only a few registers, that's pretty reasonable.
But then again, that's a lot of registers compared to the 6502. And they're
not as flexible as the 68000 set of registers, AFAIK.
Tell me, are there any common eight-bitters with more registers than the 6809?
--
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