14 Sep
2007
14 Sep
'07
11:54 p.m.
On Sep 14, 2007, at 7:49 PM, Chris M wrote:
I'm not familiar with algorithmic steps in eprom
programming. Could this roughly be likened to a
protocol like those used in serial communications (if
I'm correct, I'll assume they'd be much simpler).
On the other hand does the programming algorithm
translate to the *timing* issues that were mentioned
in a previous post? Or are they related to
rise-and-fall times and that such issues.
For EPROMs, it's a matter of setting the address/data/CS/etc lines
and activating the programming voltage at the right times, typically
repeating many times per location. "Smart" or adaptive algorithms
will pulse the location with the right bit values until they read
back correctly, then do N number of additional cycles for a safety
margin.
Parallel flash chips do things very differently...you typically
need to write a certain pattern of bytes to a certain location to
"unlock" the device, then it can be written to.
-Dave
--
Dave McGuire
Port Charlotte, FL
Farewell Ophelia, 9/22/1991 - 7/25/2007