On 30/10/10 17:26, Al Kossow wrote:
If it's going to be an adapter, could you add
holes for SA1000-style 8"
drives (50pin/20pin cabling)?
I almost mistook that for a floppy drive until I looked it up on
Bitsavers...!
I can't see any real reason why SA1000 support couldn't be added to the
bridge-board. Looks like the only changes required would be:
- An oscillator to generate the 3.6866us +/- 0.1% timing clock
(270982 to 271524Hz, nominal 271253Hz). Although I have no idea what
standard crystal frequencies could be used to generate that signal. The
FPGA's PLL might be persuaded to do it, though, I'll have to check.
- Two jumpers to disconnect the Timing Clock from the ST412/506 Data
connector when these are not in use (or maybe just a second connector?)
- A 50-pin connector for the SA1000 control cable
The extra cost probably isn't worth worrying about... though I might
have to restrict drive selection to Drive 0 only in order to get enough
I/O pins for head selection.
Thanks,
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/