16 Apr
2007
16 Apr
'07
9:57 a.m.
Subject: Re: MFMulation? (Solid-state replacements for MFM drives)
From: Jules Richardson <julesrichardsonuk at yahoo.co.uk>
Date: Mon, 16 Apr 2007 06:56:56 -0500
To: General Discussion: On-Topic and Off-Topic Posts <cctalk at
classiccmp.org>
Chuck Guzis wrote:
Index is once per revolution. Number of sectors is NOT fixed.
One problem is that many of the MFM controllers were into interchangeable.
For example a 5mb St506 formatted with my Teltek S100 controller is NOT
readable by any WD based controller or for that fact even with a Compupro
S100 st506 controller!!! Seems the underlying format (ID, gaps, Sync...)
is not standardized at all. Further In the DEC world there were RQDX1/2/3
controllers, the RQDX1/2 were compatable and used the same format as they
were the same board (ignoring firmware upgrades and some logic fixes).
The RQDX3 however was a differnt animal and required a reformat of the
drive (or a specificly RQDX3 formatted replacemen) to use it.
In the PC world the WD1003 was a common standard for MFM and the 1005
was a RLL so you alreay had the same drive and two possible formats.
Same was true for other systems I'm sure.
On 15 Apr 2007 at 19:36, David Comley wrote:
I'm not sure - remember the task is to emulate a drive, not a controller.
Isn't an MFM ST506/412 drive just a bucket of rotating bits and a track stepper?
Or does the index pulse function more like that of a hard-sectored floppy -
i.e. the number of sectors per track is fixed in hardware, and there's an
index pulse at the start of each sector? Exactly. My intended uses are primarily
VAX/VMS-based.
Since, as in floppies, you're dealing with raw (unseparated ) data at
5MHz or thereabouts, recording bit transitions is out of the
question. So you'd need some circuitry to both interpret and to
synthesize not only bits but the various address headers and CRCs.
IIRC, there wasn't a huge amount of interchangeability between the
various controller vendors, so you'd need several (selectable)
routines to handle that. Then there's the matter of RLL and ARLL--
and synthesizing CRC or ECC results. Even if that is the case, I wouldn't have thought
it makes much difference -
it just means that buffer memory and permanent storage is organised a little
differently. The device is still like a big floppy, just with more heads and
the need to record faster timings between bit transitions: the principle's the
same, it just needs someone with experience of working with fast logic to
design the board layout and code for whatever CPU / DSP is used.
There is a notable differnce from say a hard sectord NS* floppy to a 1771
soft sectored TRSdos floppy from a floppy from a system using a 1791. Thats
a lot of distance to cover. Sure you can store it as a pattern of bits
and it's only possible as ram or some non-moving storage is now cheap.
Of course the problem of storage viability over time (longevity of media)
is still and issue.
Allison