On 12/24/13 11:04 AM, John Wilson wrote:
clinging to 5V for the rest
is pointless.
That has been true for RAM since the mid 90's
I lived though that miserable time when our PPC ASICs
were 5V but you could only get 3.3v DRAM (the fast page mode
to EDO transition) and all the timing problems that resulted
from the 5-3v translators.