Unibus / Qbus bus drivers and receivers

I haven't seen the correct answer to this, so... You need to limit the edge rate to prevent ringing on the bus. Note, ringing will show up in different forms on EVERY board in the system, not just the one you are designing. Draw two square waves on a the top edge of two pieces of paper (one each). Now, slide the two relative to each other and think about what the sum of them would look like. Somplaces you get double amplitude, other places you get negative amplitude. This is ringing. It is bad. The best solution is to use an edge rate limited chip. DEC doesn't make them anymore, but you might be able to remove them from an old DHV11 that nobody wants (they show up on ebay occasionally for next to nothing and don't sell). Otherwise, a small resistor in series with the output of the gate will slow the transition down. Here is the right way to do it: 1) Find or calculate the source resistance of the driver. tau = RC 2.3 * tau is approximately 90% charge (or 90% voltage) or 2.3 * tau ~= 9nS so, Rpin ~= (9ns / Cpin) (C in Farads, R in Ohms) [ Is that right? as C goes up, R goes down... Okay ] 2) Look at the capacitance spec for the bus (I'll call them Cmin and Cmax), and calculate the new resistor (Rnew) 10ns = 2.3 * (Rpin + Rnew) * (Cmin + Cpin) Tmax = 2.3 * (Rpin + Rnew) * (Cmax + Cmin) [ bigger R or bigger C make rise time worse ] Regards, Clint On Thu, 28 Jun 2001, Michael Davidson wrote: