3 Jun
2006
3 Jun
'06
1:07 a.m.
William Maddox wrote:
Roy J. Tellason wrote:
Indeed. In the days before PAL's (later renamed PLA's), GAL's,
FPGA's and other ASICs, implementing "junk logic" used up lots
of DIPs really quick. Consider that two device pins are required
to connect an output from one gate to an input of another...
The AOI's facilitate sum-of-product implementations of arbitrary
combinatorial functions. And, they are often faster (end-to-end)
than gluing together discrete gates.
Using AOI's was a bit of an acquired taste -- they are their own
little specialized logic family, of sorts. E.g., "expanders"
presented different signal characteristics than the regular logic
inputs on the same device.
I've been wondering for a while now what the
major use was of those
"AND-OR-Invert" gates, since the early TTL stuff I became familiar
with first had a bunch of them in the databook...
Anybody know?
This particular configuration of gates comes up frequently in digital
logic, and combining gates in this way provided more gates with fewer packages. The 7451, using 2-input AND and OR gates,
was often used as
a dual 2-to-1 MUX with unencoded select inputs. The inversion of the
output was not so much a feature as consequence of the fact that an
inverted output was easier to provide, e.g., NAND and NOR are more
commonly used than AND and OR for this reason. NAND and NOR are
also in some sense more universal -- you can compute any boolean
function with sufficient numbers of either NAND or NOR gates alone, but
not with AND and OR, which may require the use of inverters as well.