13 Mar
2007
13 Mar
'07
4:06 p.m.
Hi Roger,
I am sorry, I just discovered a new "feature" of
the PEC - so please ignore the "divide data"
of the last email. Perhaps you can explain
this.
My test porgram for the DIV was implented
as loop using the index register (B) to
save the results to the core as follows:
load values
DIV/MUL
load index register from pointer
store accu to core with index
move Q to accu
load index register from pointer
store accu to core with index
increment pointer
do next values
And I noticed, that loading the index
register (B) influences the Q register!
In the abouve example my multiply failes,
too. If I do it in the following way:
load values
DIV/MUL
store accu to core-tmp
move Q to accu
load index register from pointer
store accu to core with index
load accu from core-tmp
load index register from pointer
store accu to core with index
increment pointer
do next values
Than the MUL works as desired (with 0x23 as memory
operand):
Akku before: 001 005 010 020 050 100 120 150 200 500 fff
Q before: fff 500 200 150 120 100 050 020 010 005 002
Akku after: 000 000 000 000 001 004 004 005 008 015 fff
Q after: 023 0af 230 460 2f0 300 760 5f0 600 700 7dd
Especially, you can see, that 0x50*0x23 leads to
0x12f0 which is caused be the fact, that bit 11
is not used in the shift operations and thus
bit11 of Q is not valid and the MUL is in fact
11bit*11bit unsigned.
So now let's repeat the experiment with the "DIV"
instruction using the proper code (again memory
operand is 0x23):
Akku after: 03b 125 3a9 751 ff5 f43 f23 ef1 e3f b31 fc5
Q after: 01d 092 1d4 3a8 7fa 7a1 791 778 71f 598 7e2
Still I cannot see the divide instruction behind
these numbers. Now I an sure, that the framework is
OK since I checked it with the logic analyzer.
Below I show you the list file of my assembler,
do you think, this helps in out communication or
would you prefer to get listings in your 8/23
you kindly explained in your last email. It would
not be a problem to teach my assembler to generate
such output, too.
Best regards and good evening,
Erik.
LISTING OF DIV-Test:
13 @ 0019 ORG 0 ;
14 @ 0020 ;
15 @ 0021 0000 023 data: DW 0x23 ;
16 @ 0022 0001 000 Index: DW 0 ;
17 @ 0023 0002 FF3 Counter: DW 0xfff-12 ;
18 @ 0024 0003 000 a1: DW 0 ;
19 @ 0025 0004 000 b1: DW 0 ;
20 @ 0026 ;
21 @ 0027 ORG 0x20 ;
22 @ 0028 ;
23 @ 0029 0020 001 accu: DW 0x1 ;
24 @ 0030 0021 005 DW 0x5 ;
25 @ 0031 0022 010 DW 0x10 ;
26 @ 0032 0023 020 DW 0x20 ;
27 @ 0033 0024 050 DW 0x50 ;
28 @ 0034 0025 100 DW 0x100 ;
29 @ 0035 0026 120 DW 0x120 ;
30 @ 0036 0027 150 DW 0x150 ;
31 @ 0037 0028 200 DW 0x200 ;
32 @ 0038 0029 500 DW 0x500 ;
33 @ 0039 002A FFF DW 0xfff ;
34 @ 0040 ;
35 @ 0041 ORG 0x30 ;
36 @ 0042 ;
37 @ 0043 0030 FFF ssr: DW 0xfff ;
38 @ 0044 0031 500 DW 0x500 ;
39 @ 0045 0032 200 DW 0x200 ;
40 @ 0046 0033 150 DW 0x150 ;
41 @ 0047 0034 120 DW 0x120 ;
42 @ 0048 0035 100 DW 0x100 ;
43 @ 0049 0036 050 DW 0x50 ;
44 @ 0050 0037 020 DW 0x20 ;
45 @ 0051 0038 010 DW 0x10 ;
46 @ 0052 0039 005 DW 0x5 ;
47 @ 0053 003A 002 DW 0x2 ;
48 @ 0054 ;
49 @ 0055 ORG 0x50 ;
50 @ 0056 ;
51 @ 0057 0050 000 resultACCU: DW 0 ;
52 @ 0058 ;
53 @ 0059 ORG 0x60 ;
54 @ 0060 ;
55 @ 0061 0060 000 resultSR: DW 0 ;
56 @ 0062 ;
57 @ 0063 ORG 160 ; Programmstart
58 @ 0064 ;
59 @ 0065 ;
-----------------------------------------------------------------
60 @ 0066 ;
61 @ 0067 00A0 001 reset: LDI Index ;
62 @ 0068 00A1 430 LDA ssr ;
63 @ 0069 00A2 EA0 MATSR ;
64 @ 0070 00A3 001 LDI Index ;
65 @ 0071 00A4 420 LDA accu ;
66 @ 0072 00A5 D00 DW 0b0110100000000 ; DIV?
67 @ 0073 00A6 503 STA a1 ;
68 @ 0074 00A7 E20 MSRTA ;
69 @ 0075 00A8 504 STA b1 ;
70 @ 0076 00A9 001 LDI Index ;
71 @ 0077 00AA 560 STA resultSR ;
72 @ 0078 00AB 403 LDA a1 ;
73 @ 0079 00AC 001 LDI Index ;
74 @ 0080 00AD 550 STA resultACCU ;
75 @ 0081 00AE A01 INC Index ;
76 @ 0082 00AF A02 INC Counter ;
77 @ 0083 00B0 990 RJAN reset ;
78 @ 0084 00B1 800 stop: RJMP stop ;
79 @ 0085 ;
80 @ 0086 ORG 4095 ; Freeze to prevent
jump-over
81 @ 0087 0FFF 800 looi2: RJMP looi2 ; in free running mode