With all SMT,
he packs the boards very closely, performance
is of course not so great with discrete junction transistors running
in saturation.
Jon
Hmm, you know he could compact the transistors even more if he used TTL
logic - that would be a great space saver (ducking).
I reckon he could comapct it even more if he used MOS logic in FPGAs
(ducks even more...)
-tony