Major progress to report on the SCSI to IDE/SD bridge project. Now the IDE
subsystem and the core CPU/RAM/UART are confirmed working with the debug
monitor. The SCSI subsystem is responsive and development continues on the
firmware. This will be real work since the Z53C80 will be operating in
target mode versus host mode but I think it is doable. It will probably
will never be a speed demon but should work fine for older slower SCSI-1
devices which is the intended audience.
The project is not architecture specific. At least in theory this board
could be useful for a wide variety of computers such as Atari, Amiga, Mac,
DEC, etc as well as less intuitive SCSI-1 using machines such as sewing
machines, synthesizers, lab equipment, etc. Please contact me if you are
interested in joining the development team. Thanks and have a happy
holidays!
Andrew Lynch
From: Andrew Lynch [mailto:LYNCHAJ at
YAHOO.COM]
Sent: Saturday, November 24, 2012 11:22 AM
To: 'n8vem at googlegroups.com'
Subject: RE: [N8VEM: 15014] SCSI2IDE Progress
Thanks Wayne! That's fantastic news! Woo Hoo! Thank you very much!
It sounds like we may need a change to the Flash ROM write logic.
I will take a look to see if I can figure out what is causing the glitch.
Thanks and have a nice day!
Andrew Lynch
From: n8vem at
googlegroups.com [mailto:n8vem at
googlegroups.com] On Behalf Of
Wayne Warthen
Sent: Saturday, November 24, 2012 12:07 AM
To: n8vem at
googlegroups.com
Subject: [N8VEM: 15014] SCSI2IDE Progress
I'm happy to report a little progress on the SCSI2IDE front. Today, I was
able to prove out the basic board with Zapple Monitor. I was also able to
drop in the existing PPIDE driver from RomWBW and prove out the PPIDE
interface to a CF card (basic sector read/write tests worked). Finally, I
was also able to read/write the mode data on the SCSI controller chip. This
is all still a bit of a hack, but definitely coming together...
The 32K flash chip on the board was giving me some trouble. The chip kept
getting corrupted during power on/off cycles. I finally severed the /WR
line and tied it high. The chip does have a software write protect
mechanism, but I was afraid to use it because I wasn't sure if my programmer
would know how to unprotect it.
I intend to clean up my work and post a work-in-progress build on the Wiki
in a few days.
-Wayne
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