27 Oct
2017
27 Oct
'17
11:28 a.m.
On 2017-Oct-27, at 10:27 AM, Paul Koning via cctalk wrote:
So it's a question of what you're after. If
you want to run the software, or teach the machine at the programmer level, SIMH or
equivalent is quite adequate. If you want to teach FPGA skills, an FPGA behavioral model
emulation is a good project, especially for a small machine like a PDP-8. As for the gate
level model, I'm not sure what argument to make for that other than "paul is a
bit crazy" and "because the data exists to do it". :-)
I would add that gate/logic level simulations in some instances can be useful if you have
to understand and repair the original hardware.
Back in the 90s I was attempting to repair a 60s-era SSI-based calculator, I
reverse-engineered it but was still stuck with issues of access
to the PC boards, understanding the design, having to hack up the PCB traces or unsolder
(unobtainable) ICs.
I resorted to writing a logic simulator (in a high-level scripting language) and entering
the 'net list' of the reverse-engineered logic to
produce a gate-level simulation.
I could then play around with the simulator, slow the clock to observable rates, monitor
any and multiple points, break connections,
force logic levels, eventually to obtain the same fault as the real hardware.