3 Nov
2010
3 Nov
'10
4:52 p.m.
On 03/11/10 23:32, Al Kossow wrote:
Ground is on the 'back' (solder) side, but some parts of the PSU (the
high-current parts!) have their own localised ground planes which attach
to the main plane with a grid of vias.
160x100
Eurocard, 2-layer FR4
buried ground plane ? looks like two signal layers with power but no ground anyway.. looks nice. PIC squirts the config bitstream
to the FPGA on reset
or does it come from the host?
It comes from the host.
The PIC runs a simple bootloader which checks to see if a valid firmware
image is loaded. If so, that firmware image is booted, else the PIC
drops into "load" mode. The BOOT jumper can also be used to force entry
into the bootloader.
Once the firmware boots, it waits for a USB connection, then enumerates
with the host. The host sends a microcode image to the PIC, which then
squirts it into the FPGA over the Passive Serial Configuration Link.
Basically, it reads the RBF file, bitswaps each byte, then feeds it to
the PIC.
When the microcode is loaded, the host does a quick check to make sure
the FPGA accepted the bitstream, then queries the microcode type ID and
version. After that you program registers on the chip to make it "do
stuff". POKE, PEEK and all that jazz :)
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/