5 Nov
2003
5 Nov
'03
9:08 a.m.
Following up on my on post, and top-posting at that :-)
IT WORKS NOW!!!
Apparently, I hadn't actually swapped two of the cards that
I thought I had.
It was the G021 swap at A31/A32 that didn't appear to have
happened. Swapping it again (anyway) moved the problem to
another bit.
I had to pull a G021 out of my PDP-12 to fix the 8/I :-(
Now I can run a small program!!!
0000 2010 ISZ 0010
0001 5000 JMP 0000
0002 7001 INC
0003 5000 JMP 0000
This flashes (almost) all the lights in the accumulator in a nice,
slow, count up. I say almost, because apparently an M220 is still
broken and doesn't carry. I've found it, now just to fix the chip.
OH HAPPY DAY! :-)
Cheers,
-RK
Robert Krten sez...
O. Sharp sez...
--
Robert Krten, PARSE Software Devices +1 613 599 8316.
Realtime Systems Architecture, Consulting and Training at www.parse.com
Looking for Digital Equipment Corp. PDP-1 through PDP-15 minicomputers!
I finally got the original post, along with the followup. :)
:-)
It suddenly dawned on me that I've got the
memory-extension schematics
on my hard drive (thank you, Mr. Kossow!), and can actually look at
them without digging through the storage room...
Yes, Al's site is an *excellent* resource!
In the Memory Extension Control the MB is indeed
buffered, and becomes
the MCBMB (presumably "Memory-Control-Buffered Memory Buffer").
Curiously, it rebuffers the MB by taking the signal from the _other_
side of the original MB00 flip-flop - e.g., MB00(1) - and inverting
it prior to use. I'm guessing this is to minimize rewiring of the
backplane when installing the extended-memory option. The inversion
for MB00 takes place on the M617 at B12. Does the problem move down to
MB06 if you swap the M617s at B12 and B13? Similarly, is the MB00(1)
Swapped; no change :-(
signal making it from E34 pin T2 to B12 pin A1?
Yup. Connection exists on the backplane...
I don't know if that'll make a
difference, but I'm hoping. :) The
rebuffering looks like it's primarily for extensions located off the
main board, but it may affect the first two 4K stacks as well.. I'm
not sure what wiring changes, if any, are done on the 8/I backplane to
accomodate the memory-extension control, or whether the MB/MCBMB
signals are a part of that. Anyone know of a reference for this?
Anyway, that's my thought. I hope it helps, because if that isn't it
the guesses start getting esoteric. :) :)
Bring on the esoteric guesses! :-)
Thanks,
-RK
--
Robert Krten, PARSE Software Devices +1 613 599 8316.
Realtime Systems Architecture, Consulting and Training at www.parse.com
Looking for Digital Equipment Corp. PDP-1 through PDP-15 minicomputers!