11 Apr
1998
11 Apr
'98
9:11 a.m.
Ahhhh, a little bit of checking around and I found this FAQ:
http://www.village.org/pdp-11/faq.html
Also, our favorite Tim Shoppa is listed as the maintainer of a
historic PDP-11 archive at sunsite.... go figure. ;-) The FAQ
is pretty small, but it's got a bit of history and a _very_
informative section containing the PDP-11 instruction set,
register layout, and a bit about the MMU (though not as much as
I would have liked - not complaining here!).
Alright, so what we have is the last 4KW used up for stack
space, register mapping, and IO mapping. I would guess the
first 4KW were used up by the boot prom and monitor, which
leaves about 12KW for an application jump table and
initialization, the rest for memory mapped windows to the
MMU... do I have it right? Even on a machine with a full
22bits of address lines on the backplane, like an 11/73, the
CPU still only has a 16bit address space. The faq doesn't make
it terribly clear what happens if you want to open up any
arbitrary window.
When you say that I take the first 4 bits of an address to
specify the page register, and append my 12 bits of address to
the contents of the page register to form my jump, I still need
a physical 16 bit address to load into the program counter for
the jump. hmmm, I'm really confused:
QUOTE:
0 000 000 001 ddd ddd -- JMP JuMP
Loads the destination address into the PC, thus effecting an
unconditional jump. Note that a trap will occur on some systems if
an odd address is specified. On others, the destination is
silently rounded down to the next-lower even address (i.e., the
right-most bit is ignored).
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
|0|0|0|0|0|0|0|0|0|0|0|0|0|i|i|i|
| | | | | | Op |
UNQUOTE:
Why is the jump destination address only six bits long?
Jeesh, I hope I'm not asking the obvious....
BTW: Tony Duell is also listed as a contributor to the
FAQ... jeesh, we've got everybody!
--jmg
From: allisonp(a)world.std.com (Allison J Parent)
Subject: Re: You've got to be pulling my chain... (Ethernet)
< Allison, this was private email, but I figure this may be
OOPs, though I did check the header as classiccmp...?
< like the 11/23 and 11/73 line should run this BSD variant as
< well... what I want to know is, did the kernel fit into 64K in
< one segment, or did they spread the kernel across segment
< bounderies? If so, how?
The kernel never fit in 64kb as the pdp11 is word addressed also the MMU
operates on 4kb pages. Also the top 4kbytes are IO space. So the idea of
the kernel fitting in 64k is not relevent. The real question was did it
fit in the 11/44 or 45 who only had 256k (18bit addresses) space. The
11/23 and later Qbus machines were Q22 (4mb address space). The larger
space means more available ram that can be used without resorting to
swapping (or at least less frequently).
Also PDP11s come in two other flavors, those with I&D space and those
without. The 11/23 and 11/34 are those without. The 44, 45, 70, 73,
83 and others have I&D which means that Instructions and Data spaces can
be seperate doubling the amount of memory available. Added to that is
user and system space (memory protection between processes). So it's
possible for a PDP11 to actaully address four distinct areas of memory
that are non-overlapping and all 64k in size. Practical considerations
limit it to less than that but it's nearly so and likely they would
overlap as well.
< I mean, I could see overlays (in the kernel... blech!), but I
< don't remember the 11 supporting long long jumps... and address
< value was 16 bits, period. Still, I was never great at 11
True of all segmented address machines. The larger 256k or 4mb space is
broken into pages of which up to 8 are mapped into the 16bit address
space. To do a long jump what is really done is the cpu remapped the
needed page into logical space and does a 16bit jump to that page.
The top 4 bits determine what page register is addressed and the contents
of that register is appended to the lower 12 bit to form the larger
address needed to manage a 4mb space.
It takes 8 MMU registers and uses the content of the reg plus the 16bit
address to form an address in physical space.
< assembly. Could someone here give a good detailed account of
< PDP-11 segment mapping support? Could my stack and register
< values be retained and follow while moving from segment to
< segment? And how the hell did you tell the memory manager you
< wanted to pop to another segment, anyway?
yes! A detailed discussion would wear out my fingers typing it.
Sufficient that it was able to address more than 64k and while different
than the 8088 or 286 in both cases the 16 bit address space was extended
by argumenting the basic addressing and not extending the basic register
set.
I'm currently building a system using the z80 cousin called the z280 that
can address 16mb of ram and the basic addressing is still 64k argumented
by a MMU.
Allison