2 Dec
2014
2 Dec
'14
8:51 a.m.
On 12/01/2014 11:13 PM, Eric Smith wrote:
On Mon, Dec 1, 2014 at 8:03 PM, Jon Elson <elson at
pico-systems.com> wrote
[about NS32K]:
Yes, I do KNOW about the iAPX
4/32, and know somebody who
worked on one. Glacially
slow. It was an ambitious project, and if object-oriented
machine language was your
thing, it was what you needed. But, as for a practical
computer, it didn't make it.
It was certainly a CISC design, and probably not
as clean as the VAX
architecture
(although the number of addressing options on the VAX may have gone off the
deep end also).
You haven't seen "off the deep end" CISC until you
look at the Intel iAPX 432,
which makes the VAX architecture look lean and mean. For that matter, VAX was far simpler than x86 and
x86_64 have become.
Far cleaner, too! The PDP-11 instruction set was quite
good, the VAX had to move all
3-bit fields up to 4 bits, so they had to come up with 16
addressing modes. I suspect
some of them were so rarely used most programmers who even
worked in assembly
language didn't quite know what some of them did. The x86
is just a mess, like king
Ludwig's castle.
And I wouldn't argue that it's CISC, but even
the ARMv8 architecture manual is
over 2000 pages.
I use the Beagle Board and Beagle Bone. The TI manual on
the OMAP processors
is VERY badly organized, and vastly larger than it really
needs to be. For instance,
where they have 100 essentially identical registers for GPIO
configuration, they
have them described on 100 nearly identical pages. One page
with a description
of how the addressing applies to the banks of registers
would have been a LOT
better.
Jon