From: "Chuck Guzis" <cclist at
sydex.com>
On 29 Jun 2007 at 1:08, Brent Hilpert wrote:
Core logic is quite a different form of gate
implementation than what we
normally deal with, the static state of the network is represented by
the
magnetic field of the cores (not by DC voltage
levels at gate outputs)
and it
requires AC activity into the cores to propagate
changes through the
network.
Bitsavers has the operations manual and complete schematics for the
SS-80 with a really good explanation of how these things work. If
you're used to semiconductor logic, core logic is *very* different.
If you consider other machines of the time and that the entire logic
power came from the clock signal, 6 4X150s (at what, 250W plate
dissipation per the each?) wasn't bad at all.
It'd be fun to see if the large cores for this type of logic could be
obtained to experiment with this logic type again.
Hi
If this is the logic I'm thinking of, the clock is needed to keep the state
of the data through the cores and also provide amplification power
to propagate the data.
The principle was that the cores could take on one of two phase states,
representing 1/0. It used the non-linear saturation of the cored to make
a divide by two. Since the divide can happen on either the first or the
second cycle of the input clock, there were two states. Amplification
happen because the cores windings were connected to a capacitor.
multiple cycles would increase the aplitude. The output was just two
wires so one could also create inversions. Logic was created by summing
inputs from input data.
This logic was very reliable being magnetic material. Unlike tubes that
could occationally give incorrect answers. As long as it had enough
clock signal it would be fine ( 4X150's ).
There was someone on the list ( as I recall ) that had one of the
experimenter kits with this logic in it.
Dwight
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