19 Dec
2005
19 Dec
'05
7:34 p.m.
Steve Thatcher wrote:
just a note... CPLDs are easier because the EEPROM
config is inside the chip (no external hardware and an easy to use interface). The cost of
this is available logic density though. You will always get more FGA logic space available
then you will with a CPLD. Of course, you can always add more CPLDs, but one FPGA and a 8
pin dip eeprom is less PCB real estate.
best regards, Steve Thatcher
I know that, but in my case I use CPLDs because
1) -- they are cheap
2) -- the development chip was cheap $99 us
3) -- they are power on programed
4) FGA's all seem to come in BGA packaging @ 3.3 volt logic - the cplds
are 5 volts in a 84 pin plcc package.
5) I buy more CPLD's rather one big NEW FPGA if I out grow my design.
6) I can't buy TTL and sockets for 2 cents each anymore.