12 Feb
2014
12 Feb
'14
3:23 a.m.
At 07:09 PM 2/11/2014, allison wrote:
On 02/11/2014 06:24 AM, Rick Murphy wrote:
CLL after the first iteration will drop bits if I'm not mistaken.
It's actually
CLL RTL
RTL
RTL
-Rick
At 08:57 PM 2/9/2014, Kyle Owen wrote:
CLL RTL ; clear link rotate two left, iterated three times.
CLL RTL
CLL RTL
Least that what memory says. - The OS/8 system handlers use some PDP-8/E and
later instructions. If
someone wants to help go back through and track these down, we can
see if a
more compliant version will still fit in the allotted space.
I had a quick look at the code and it's not going to be particularly
hard to get rid of the BSW instructions.
I got distracted trying to remember where the three-instruction BSW
subroutine is found. In TSS/8 somewhere IIRC.