Hand-wired core for ROM?

On Fri, Apr 10, 2015 at 10:08 AM, Johnny Billquist <bqt at update.uu.se> wrote: Wrong. There does exist core ROM. It works differently than "normal" core memory, and doesn't require the hysteresis loop used by normal core, nor does it need to flip the magnetization of the cores. Instead it uses each core as a transformer. It is called "core rope" memory or "wire braid" memory, and is closely related to the IBM TROS (Transformer Read Only Store) used as control store in some System/360 CPUs and peripheral control units. It was used in the Apollo Guidance computer, the DEC PDP-9 control store, some PDP-16 configurations, and the HP 9100 desk calculator. It was probably used in many other machines of that era also. Each "word" of core ROM has one drive line. That line is threaded through some of the cores and around others. The core acts as a transformer, so a pulse on the drive line is coupled to the sense lines of the cores that the drive line is threaded through, but is not coupled to the sense lines of the cores that the drive line bypasses. Typically about 64 drive lines are used for one set of cores; beyond that another set of cores would be used. That makes it 64 times as dense, in terms of bits per core, as normal read-write core memory. The HP 9100 has two levels of control store. The top level is a 32Kbit inductively coupled PCB, which is amazing in its own right. The lower level store is a core rope memory of 64 words of 29 bits, so there are 64 drive lines each threaded through or around 29 cores, with 29 sense amplifiers. To change the contents of the core rope memory, you have to rewire it.