17 Mar
2005
17 Mar
'05
9:41 p.m.
It was thus said that the Great Tony Duell once stated:
Just an observation, but this is reminding me so much of the arguments
I've read about Assembly vs. C ...
-spc (Or now, about C++ vs. Perl ... )
For a complex change, doing it on the FPGA is
much faster. For instance,
suppose I decide that I want to change the load and store byte
instructions to be little-endian rather than big-endian. With an HDL
That's not a change, it's a redesign :-). Seriously, I do like to have
some idea of what I am trying to build before I start building it.
IF I want to do things like experiment with
adding extra pipeline stages,
the FPGA is an even bigger win.
And when it doesn't work, and you can't probe the relevant signal in the
FPGA, the board of TTL/ECL is a much bigger win...