Report on vintage "Programmer Electronnic Control" alias "RAF Tornado Computer"

Aircraft development takes a long long time. To make it worthwhile the aircraft has a long service life. Whilst the computers are bullet proof in an office/home, the temperature extremes, vibration, high G forces etc in service means that many failures occur and PCBs could be replaced many times over the years, so do not pay too much notice of the dates on components of the boards currently installed. There were at least four 12 bit versions, and one 13 bit apparently. Then 12 bit models were the 902, 102C, ARCH 105 and Minim or 12/12. You have it the wrong way around. The GEC name replaced the Marconi name, which had earlier replaced Elliott. Core memory was very convenient for military applications and was in use long after it was replaced in commercial applications. Think of a missile or torpedo held in stock for many years, stick a power plug into it and program the target, pull out the plug and then launch it. Only then does the internal power supply come up, the processor boots up and does its thing. Not directly but I may be able to help. On the 18 bit machines these were relative to the start of the 8k memory module the instruction was in. An interesting modification. On the 18 bit machines, it actually stored the program counter + 1 and the following instruction was either an 8 or a "/8", i.e. 24. This should multiply the signed accumulator and the signed memory operand giving a double length result in the A and Q registers. This divides a signed DOUBLE LENGTH number in the A and Q registers by a signed memory operand. IIRC the A register gets the result and the Q register the remainder. Shifting by the entire word length does transfer Q to A or A to Q (but the data disappears from the source). A load immediate instruction would have been very handy. There was also a block move instruction here in the 18 bit machines. Maybe some of the special 15 orders were encoded in the 14 order on the 12 bit machines with only 256 numbers available compared with 8k on the 18 bitters. Do you mean you cannot turn the B-register modification off? Does it get cleared automatically somehow? Eh? I am willing to try. By the way, there are two 't's in Elliott. On the later 920s, the current interrupt levels B register and sequence control register (i.e. program counter) were held in real registers but the other interrupt ones were held in memory. There was extra circuitry to make it so that writing to the current level's B register address actually got trapped and also modified the real register. Could it be that there is a value of 0x0A0 at location 0? I suspect the big plug is for the OMP (Operator's Monitor Panel), and yes the program would be loaded via this once, probably in the factory or at a maintenance depot, and the machine would probably be rebooted many times afterwards. The 920 was unusual in that it booted into the highest level interrupt, level 1, so no interrupts will be serviced until you go down an interrupt level or two or three. The 15 order is coded thus: 15 0 to 2047 Input 15 2048 Shift A register left 7 places and OR in a character from the paper tape reader (via OMP) 15 2052 (IIRC) Wait until character pressed on teletype and read into A register (via OMP) 15 4096 to 6143 Output 15 6144 Output character to paper tape punch (via OMP) 15 6148 Output character to teletype (via OMP) if I remember correctly 15 7168 Terminate current program level i.e. return from interrupt 15 7169 Test if standardised IIRC, skip the next instruction if the accumulator is zero or top two bits are different 15 7170 Increment B and skip the next instruction if bottom 13 bits are zero 15 7171 Read the value of the control keys on the OMP 15 7172 Move l.s. 17 bits of A to the m.s. 17 bits of Q. Bottom bit of Q is zeroed 15 7173 Move m.s. 17 bits of Q to l.s. 17 bits of A. Top bit of A is zeroed 15 7174 Move A to B 15 7175 Move B to A 15 7176 Set relative addressing mode 15 7177 Set absolute addressing mode In relative mode, all addresses are relative to the start of the 8k block of memory the instruction is in. In absolute mode (the default), 7,8 and 9 orders are still relative but in all others the address is absolute, so that only the bottom 8k of memory is accessible without using B modifiers. Roger Holmes.