USB Universal Floppy Disk controller

Philip> In message <1110833470.10973.51.camel at weka.localdomain> Jules Philip> Richardson <julesrichardsonuk at yahoo.co.uk> wrote: Philip> CPLDs tend to cost between ??10 and ??20 each in 1-off, but you Philip> can stuff nearly all of the logic into just one of them. You Philip> could even make the board in-circuit reprogrammable if you Philip> wanted, but I'd be tempted to use an SRAM FPGA instead of a Philip> CPLD if I did that, simply because most FPGAs have open Philip> programming specs (it's something of a requirement - if you Philip> have to reload the fusemap every time you powercycle the Philip> chip, you're not going to want to drag the manufacturer's Philip> programmer around with you). Some of the better nonvolatile FPGAs also have open programming specs. In particular, there's the protocol called "Jam" (or was that "Jazz"?) used by Altera. It's not just open, it's also clean, well-designed, and easy to implement. Philip> Parallel port then. I'd add "Portable across multiple Philip> platforms" which basically means "parport or nothing". Every Philip> desktop and laptop machine I've seen has had an Philip> IEEE-1284-compliant (or compliant to a reasonable degree) Philip> parallel port. I guess you haven't looked at Macs then. The problem with parallel ports is that they typically have up to four different modes, all of which have drawbacks. 1. Classic output-only mode. Not applicable here, of course. 2. PIO bidirectional mode. Works fine but it's VERY slow. Not just because of the PIO nature, but also because in this mode the port uses open collector signaling, so the rising edges are all defined by RC time constants. 3. ECP mode. This is a block transfer mode useful for printers, not obviously useable for anything else. 4. EPP mode. Nice, clean handshake protocol, with totem pole tristate signaling. Not quite so trivial either on the software or the hardware side, though. I did a CPLD implementation of #4, which seems to work. In the first PC where I used it I had to install an add-on card, though; the built-in port didn't support EPP. But the HDL for the state machine was fairly complicated, and getting rid of all the metastability issues (since there is no clock in any of these modes) wasn't trivial either. paul