bfranchuk at jetnet.ab.ca wrote:
Andrew Lynch wrote:
That means compromises had to be made and some
stuff had to go.
Anyone can design a great computer on paper. Making a real, tangible
part
is a lot more difficult.
Using cool sounding but almost impossible to find parts seems easy but it
makes the SBC practically worthless.
If you can make a low cost Z80 SBC that includes floppy IO, I would
love to
see it. I'd even buy one or two.
But when you think about it, most early CP/M machines were
8 inch single density. Not much on a disk and that I think is
the basic format to look at. I think I seen a data separator
using a 16 bit counter at 4x? the data rate but I can't remember
where.
Have you ever used 8"SSSD to do anything that required space? There isn't
enough space to run a disassembled version of the BDOS through ASM unless you
have at least two drives and don't mind doing cleanup.
Yes you can roll your own data sep it only needs three ttl packages. With all
the other hardware needed for the 765 case you end up with at least 10 chips
though If you willing to miss a few features it's been done in 7 plus the FDC
and that doesn't include the bus side of the FDC interface.
I look forward
to seeing your design.
Thanks and have a nice day!
I can't say I am having a nice day.
I am still grumbling over not getting PAD's
PCB and LAYOUT software when I could in
the late 80's. I am looking to do a 16 bit
(2901) cpu using EEPROM (2kx8 250 ns)
and am still trying to find a schematic capture
and PCB layout program that I can afford
with through the whole parts.
Sadly all seem to be Australia. :(
Kicad for linux there are other like cadstd for winders.
Of course the last 2901 design I'd done in the early 80s was
with paper and pen! It's doable that way.
FYI using 250nS eproms will make it terminally slow unless
you do two things, use a wide microword 64bits or more and
pipeline the address and decode so you can work right to the
eprom Tacc minimum limit.
Allison