24 May
2017
24 May
'17
12:51 p.m.
On May 24, 2017, at 3:35 PM, Chuck Guzis via cctalk
<cctalk at classiccmp.org> wrote:
I suspect that a PDP-11 in FPGA is quite a bit more reliable than the
real thing--and when you're done you have a nice abstract description of
the hardware in VHDL format.
The trick is to get it close enough to correct, given the documentation lapses. The
PDP-11 is better off than many other machines (VAX and Alpha are better still) because it
has an architecture manual, but even that is not 100% complete.
http://pdp2011.sytse.net/wordpress/pdp-11/ is a nice example of an FPGA PDP-11 (actually,
the whole family -- conditional compile the model you want). It seems pretty accurate;
the fact that it runs RSTS is a good sign since that tends to be about as picky as any
PDP-11 software you'll find.
And yes, I have a pile of old CMOS/ECL/TTL logic.
Remember when CMOS logic was new-- +15V Vdd and 1MHz top speed?
No, but I remember CD4000 series logic: Vdd anywhere between 3 and 18 volts -- crank up
the voltage if you want it to go faster ("less slow").
paul