16 Jun
2005
16 Jun
'05
7:21 a.m.
>>>> "Jochen" == Jochen Kunz
<jkunz at unixag-kl.fh-kl.de> writes:
Jochen> On Thu, 16 Jun 2005 05:53:53 +0100 "Andy Holt"
Jochen> <andyh at andyh-rayleigh.freeserve.co.uk> wrote:
Jochen> [CDC6600 in a FPGA]
> As the 6600 was entirely built with discrete
components, not
> chips, and yet had to be physically relatively compact, I doubt if
> it had much more than say 20,000-25,000 gates. Nowadays that isn't
> anywhere near high end of the FPGA ranges.
Jochen> I don't know how
many gates, but the Book "Design of a
Jochen> Computer CDC6600" states on page 20: "the entire 6600
Jochen> Computer contains approximately 400,000 transistors". It used
Jochen> "Direct-Coupled Transistor Logic" so there where way less
Jochen> then 400,000 gates. --
I missed that transistor count number. But your conclusion is
incorrect; take a look at the DCTL schematics. It shows one
transistor per gate input, so a 2 input NAND or NOR gate (which is
what an "FPGA gate" is) is 2 transistors. That yields 200k gates, or
about double what I estimated in a different way. A bunch of those
transistors are in the memory circuits, so we're not that far apart.
paul