On Thu, 22 Mar 2012, Chuck Guzis wrote:
On 21 Mar 2012 at 20:17, Jon Elson wrote:
I have a product that uses a Xilinx FPGA
connected through
the PC parallel port in EPP mode, and have used it as a development
board for several oddball projects, and so a good deal of code reuse
makes this an easier path for me. The only extra job is I have to add
a buffer SRAM to my board as the on-FPGA memory is not enough to hold
the largest tape block permitted.
My Chi/Computer Logics ISA controller has 256K of memory organized as
a ring buffer with 16-bit DMA handling the transfer to CPU-local
memory. It's pretty successful in keeping up with medium-fast (75
ips) streamers, but I suspect that it would fall down on 150 ips
drives.
I think that's the same unit I have, along with a Qualstar 1052
transport.
It came with Qualstar software, but no particular technical information on
the interface card as I recall.
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