Hi
One thing that one should consider is that just tying descrete TTL's
is not the same as how it would be done on silicon. Combining nands
together would create a AND OR structure with no inversion.
When doing it on silicon, it is easier to move the and and or functions
to the inputs but then to drive the output requires the inversion.
As is mentioned this creates the AND OR invert structure that
would be faster than combining simple nand gates together making
the non-inverting AND OR.
These were, as mentioned, used as multiplexers. These were also
better to have inverted outputs for the DTL and RTL type setups.
The outputs could be wired together from several devices to drive
a single bus line. As long as the selects were all zero, on one device,
the output would be high, the undriven state of the output, the
other device could then drive the bus. As I recall, some of the TTL
devices had open collector as well and could be used this way.
Dwight
From: William Maddox <wmaddox at pacbell.net>
Reply-To: "General Discussion: On-Topic and Off-Topic
Posts"<cctalk at classiccmp.org>
To: General Discussion: On-Topic and Off-Topic Posts
<cctalk at classiccmp.org>
Subject: AND-OR-Invert, was Re: Semi-OT: IDE & SATA to USB "dongles"
Date: Sat, 03 Jun 2006 00:31:37 -0700
Roy J. Tellason wrote:
I've been wondering for a while now what the
major use was of those
"AND-OR-Invert" gates, since the early TTL stuff I became familiar with
first had a bunch of them in the databook...
Anybody know?
This particular configuration of gates comes up frequently in digital
logic, and combining gates in this way provided more gates with fewer
packages. The 7451, using 2-input AND and OR gates, was often used as a
dual 2-to-1 MUX with unencoded select inputs. The inversion of the output
was not so much a feature as consequence of the fact that an inverted
output was easier to provide, e.g., NAND and NOR are more commonly used
than AND and OR for this reason. NAND and NOR are
also in some sense more universal -- you can compute any boolean function
with sufficient numbers of either NAND or NOR gates alone, but not with AND
and OR, which may require the use of inverters as well.
--Bill