28 Aug
2020
28 Aug
'20
1 p.m.
On 8/28/20 12:13 PM, David Bridgham via cctalk wrote:
On 8/28/20 1:10 PM, Paul Koning wrote:
I use the 4 bit SDO when accessing SDHCs, adjusting speed according to
whatever the card says.
It's really easy with many microcontrollers. For example, the very
inexpensive STM32F4 series implements it natively, computes CRC
automatically and does it all in double-buffered DMA mode. Runs at
around 180MHz too with lots of GPIOs and a bunch of SRAM.
Plenty of code libraries out there. Why dink around when silicon is
cheap? MCUs are everywhere; in many cases cheaper than discrete logic.
--Chuck
SD is a packet based storage device on a serial
interconnect,
minimally one lane wide but it can also be four lanes (and that's
typically how you use it).? Apparently it starts out in a SPI
compatible mode, interesting.? Also, SD requires a rather complex
handshake at power up to get to the point where you can do I/O.
I've implemented the SPI protocol in a little micro-coded engine on an
FPGA and have considered upgrading it to the standard interface over one
to four lanes except it looks like the SD licensing says I'm not
supposed to do that without paying them a bunch of money.? And yeah, it
took me a while to work through the initialization dance and it still
fails from time to time (and from SD card to SD card).