26 Oct
2010
26 Oct
'10
7:02 p.m.
On 10/26/2010 11:52 AM, Chuck Guzis wrote:
ISTR that the Japanese at the time were somewhat ahead
of the US in
terms of high-density packaging. Didn't they originate the 64-pin
0.050" spaced DIP?
I haven't seen a 0.050 inch pitch DIP. Perhaps
you're referring to the
0.070 inch pitch "Shrink-DIP", which was very common for a while from
Japanese vendors.
Rockwell and Motorola used a 0.050 inch pitch QUIP (each row on 0.100
inch pitch), Rockwell for 6500-series microcontrollers and related
parts, and Motorola for the MC10800 series ECL bit-slice components. I
don't recall exactly when the MC10800 series was introduced; perhaps
that actually could have been used for the MC68000 had Motorola wished
to do so. (Note that Intel, Zilog, and AMP used the term "QUIP" for an
entirely different ceramic leadless package.)
The JEDEC 68-position ceramic leadless chip carriers appeared around
1981, and Motorola offered the MC68000 in that package. The PLCC
appeared a few years later.