24 Nov
2015
24 Nov
'15
9:39 a.m.
On Nov 24, 2015, at 10:55 AM, Johnny Billquist <bqt
at Update.UU.SE> wrote:
On 2015-11-24 16:43, Paul Koning wrote:
Oops.
...
To elaborate, since this seems to be an area where people get confused:
Thanks. Yes, people do seem to be confused.
1. Unibus has 18 bit addresses, with the CSR
addresses in the top 4k words and the remaining 128 kW for memory.
124 kw, but I would hope that everyone guessed that. :-) 2. In 22 bit PDP-11s with a Unibus, there is a
Unibus Map between the CPU bus and the Unibus, which maps Unibus references that ask for
memory addresses (i.e., the bottom 31 pages) into 22 bit memory addresses. That allows
Unibus DMA to any memory address.
Or between the memory bus and the Unibus, if we talk 11/70.
(I wouldn't actually know the proper name for whatever it is on an 11/24 or 11/44,
but CPU bus would suffice, I'd say. On the 11/84 and 11/94 it's the PMI bus, which
I'm fine with calling the CPU bus here.)
The Unibus map actually covers all 32 address areas, but noone normally do DMA to the top
"page", which would be the I/O page on an 18-bit system. And it can become even
more weird on an 11/70 system, since there is actually also an I/O space on the memory
bus. So better just use the 31 first mappings, and ignore the 32nd, unless you are looking
to do very specific odd things.