On 6/22/2010 12:34 AM, E. Groenenberg wrote:
Johnny is right, the 11/74 option was a multiboard set (just like the
FPP option) that could be plugged into the new 11/74 backplane (which
was an 11/70 backplane with all the CPU and FPP slots pushed down by
four to make room for the CIS option in the first slots).
How was this achived? By
reducing the Massbus card space by 4 boards
so 3 interface sections were available? Or by redesigning the processor
in such a way that there were less boards needed?
Ed
Removed one of the MASSBUS controllers.
The CPU board set was essentially the same, slot for slot. There were
several boards that needed rev/ECO to provide hooks for the CIS
option, but all in all these were minor updates and were backward
compatible.
IIRC the main change was to add additional microcode to the base 11/70
microengine (from 256 to 512 words) by doubling the PROM bit density.
This code did all the base instruction dispatch and operand fetch for
the CIS unit.