I asked how come there were only a few
bypass caps instead of the traditional one per chip,
and the chief engineer (who wrote The famous
Microcomputer Design book, Don Martin of Martin
Research), who definitely knew how to build things,
told me that the board would start with them all in.
Then they would be removed until the board stopped
working. Then they'd put that one back in!
The Earl "Madman" Muntz approach. Just because you think he knew
how to build things didn't make that good engineering practice.
You should have *more* bypass caps than you need under normal
conditions, because there will be real-world conditions that
don't match your lab bench.
There are definitely ways to determine a reasonable minimum number
of bypass capacitors as an engineering exercise, but this is MUCH
more complicated than taking them out until the product breaks, and
adding one back in. In particular, it's not just the total count
of bypass capacitors that's important. They have to be in the
right places. Just because they're conceptually all in parallel
doesn't mean that they can be anywhere on the board. The power and
ground traces (or planes) have resistance and inductance, which is
part of the reason that you need bypass capacitors in the first place.
So the bypass capacitors must be physically near the components that
have large current fluctuations.
"One per chip" or "one per two chips" are rules of thumb that can be
used with some kinds of logic chips to get reasonably bypassing
without having to do detailed analysis. Yes, you can get by with
less, but not simply by randomly removing some and hoping for the
best.
How do I know this is a problem? From personal experience with
two companies that left out bypass capacitors despite the
objections of the hardware engineer, because it still seemed to
work OK in the lab. In both cases, I had to debug the resulting
problems, which were blamed on software. At first I believed it
was the software, but eventually I discovered that adding the bypass
capacitor back into the circuit fixed the problem. Once I'd finally
proven this to management, it was ECO'd back in. In one case, a
bunch of inventory had to be reworked (expensive!), and in the other
case, the inventory was scrapped. But the worst part was the units
already in the field. RMAs cost a *lot* of money.
Seriously,
they would look at the power supply and use just
enough with a little extra margin.
You can't determine how many bypass capacitors you need
by looking at the power supply.
It's my understanding that electrommagnetic
deflected
vector displays take very, very high-power deflection
coils and drivers, and this is where the real money is
in these units. I don't know if the Imlac is
electrostatic or electromagnetic deflection
(electromagnetic, I suspect).
That has *nothing* to do with using lots of RC delays in
the design of the digital logic of a processor. I won't
go so far as to say that doing so is always wrong, but
you would need an awful lot of justification for doing it.