On Tue, 16 Oct 2012, Eric Smith wrote:
Date: Tue, 16 Oct 2012 16:22:23 -0600
From: Eric Smith <eric at brouhaha.com>
Reply-To: "General Discussion: On-Topic and Off-Topic Posts"
<cctalk at classiccmp.org>
To: General Discussion: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
;
Subject: Re: unibus to modern disk interface?
Seth Morabito wrote:
One of the biggest issues with the DEC busses
nowadays is that they use
open collector drivers.
The drivers aren't that difficult. The receivers are more of a problem. The
threshold voltage doesn't match anything commonly available.
A good high impedance (48K) RS-422 receiver can do it but would violate the 0V
leakage current (~30 uA vs 10 uA) This may not be an issue since you only
need one of the cards
(one lead tied to 1.5V so 1.5V +- 200 mV and even adjustable if you like)
Maybe the best bet would be to use a CPLD with
open collector outputs
and +5V tolerant inputs on the other side?
CPLDs (or for that matter FPGAs) don't have anywhere near the output drive.
Also their drivers have edge rates that are way too fast.
Peter Wallace
Mesa Electronics
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