Tony wrote...
I would doubt it. Those old fusible-link PROMs
were actually quite fast
with access times of <50ns in many cases. And the designs depended on it.
Surely that's easy to get around. Upon power up - or when a reset button is
pushed, the device reads the image from EEprom and places it into SRAM,
which is what is actually accessed. Isn't SRAM fast enough?
Yes, modern SRAM is fast enough. But that's 'easy' in theory. Firstly you
have to have some way of switching the SRAM between the device and the
loader (or use dual-port SRAM, which is darn expensive if it's fast).
Secondly, you need to halt the device while the SRAM is loaded.
Neither problem is difficult, but the second probably involves some
modifications to the device (if only to the reset circuit), and the
daughterboard ceases to be a 1 or 2 chips.
-tony