8 Apr
2010
8 Apr
'10
11:29 a.m.
It is poor policy to not give consideration to a
potential source of a
problem on the basis of an assumption.
Of course. That is the quickest way not to find a problem :-)
A more typical way of programming this would be to load a register with the
loop count and decrement till zero or negative. 9 is the first value to be
output both in that scenario (the '145 is a decade decoder) as well as the
observed sequence, the observed sequence being one which increments.
Now that's an interesting suggestion, I'd not thought of that, and it
makes a lot of sense.
It would be interesting to look at the key scanning lines of a working PET
(either at the input of the '145 or the outputs, suitable pulled up) to
see which direction it counts in.
I don't have the 6502 instruction encoding at
hand, but I'll hazard a guess
there is only a 1-bit difference between a decrement instruction and an
There is in most cases (assuming thr Apple ][ referecne manual is
correct), but it's not as obvious as you might think. It's not always the
same bit that changes.
DEC M (memory revference) are C6, D6, CE, DE depending on the addressing
mode. THey become E6, F6, EE, FE respecively (so it's the 32's bit that
changes)
DEX is CA, INX is E8,. So here he 32s an d the 2s bits both change
DEY is 88, INY is C8, so it's the 64s bit here.
The difference between ADC and SBC (add and subtract) seems to be the
128s bit in all cases.
Are the ROMs socketed? If so, it would be sensible to compare them with
ROM dumps fro ma working machine.
-tony