Tony Duell wrote:
ACLO & DCLO are active-low signals at the
time when I was testing out
the supply...) Guess I get to pull the supply again and do some more
debugging :). Is there a quick 'n dirty way to fake out/bypass these
signals so I can at least see if the CPU runs at all?
If you disconnect the wries between the PSU and the backplane (just
remove the pins from one of the mate-n-lock connectors, but rememerb
where they go!), the signals will be pulled high by the Unibus
terminator. I don't know if everything will initialise properly in that
case (I think it should do), but at least the CPU will do soemthing.
Thanks -- just tried this, and I still get the same behavior from the
CPU. ACLO and DCLO are now pulled high. Well, this is going to be a
fun project :). Guess I need to start debugging the CPU, any
suggestions on where to start? (Anyone have a Unibus extender card?)
-tony