TMS340x0

Richard wrote: I worked at a start up called ShoGraphics, 1991-1993. I have a lot of stories about the place, but that is another topic. ShoGraphics made an xterm with hardware accelerated PEX (Phigs Extension for X). Here is a link that google coughed up: http://calbears.findarticles.com/p/articles/mi_m0EKF/is_n1918_v38/ai_124309… It sported an i960 for networking, one i860 for control and optionally two more i860s for more beefy geometry acceleration, and mostly custom hardware for rasterization. The prototype hardware had a 34020 that acted as an asynchronous bridge between the i860 CPU and the framebuffer to allow the i860 to do dumb pixel manipulation for low end machines that lacked the rasterization hardware. However, it was a dog, at least in this system. On screen clears you could watch the "wipe" effect. To be fair, the 34020 wasn't doing any work other than video timing control and passing memory read and write requests to the framebuffer. The designer had abstractly theorized that much of the x server software could be moved over to the 34020, but the software team wasn't too keen on supporting two different processors. I redesigned the framebuffer board and made the connection between the i860 and the framebuffer synchronous, and added support for using the block write mode of the VRAM. Problem solved. BTW, the rasterizer did gouraud shading at two pixels per clock at 40 MHz. The framebuffer logic was responsible for checking the window ID plane (8b) and doing the Z buffer compare and update. The framebuffer was 80b deep. Not too bad for 1992. The system was wildly expensive as compared to the SGI Indigo, which had the advantage of using ASICs instead of TTL.