23 Aug
2019
23 Aug
'19
8:58 a.m.
On 08/22/2019 12:47 PM, Tom Uban via cctalk wrote:
On 8/22/19 12:16 PM, Eric Smith via cctalk wrote:
Wow, I think that ends up looking like a compiler, or at
least the optimizing back end part of a compiler. I worked
a bit with a Trace Multiflow, and their optimizing back end
was VERY slow, which I assume means it was a complex task to
reorder all the atomic operations and pack into the long
instruction words for best throughput.
I think it might end up looking a bit like the optimizers
that were used on drum memory computers back in the dark ages.
Jon
On another mailing list, someone asked if there
was any list specifically
about bit-slice design and microcoding. I don't know of one, so I've
created a new mailing list specifically for those topics:
http://lists.brouhaha.com/mailman/listinfo/bit-slicers
The intent is for the list to cover technical discussion of bit-slice
hardware design and/or microcoding. In other words, discussion of
microcoding that doesn't use bit-slice hardware is fine.
On a possible related note, I am looking for information on converting
CISC instructions to VLIW RISC.