On Thu, 8 Mar 2007, Richard wrote:
Awesome job, Erik!
Thank you, Richard.
You mentioned the microcode a couple of times -- have
you dumped out
the contents of the microcode? Is the CPU implemented from bitslice
chips or something?
Well, the CPU is made entirely from 74xxx chips - NO BITSLICE chips
in ther. Of course they used the SMD military variant of the chips 54xx
and date codes range from 1982 to 1986. I am sure that the powersupply was
replaced at least once (not wondering looking at the design). The
core PCBs are standard DIL-packages and might have been used in
other designs (I discovered a design bug there, too ;-) )
Back to the CPU: It consists of three PCBs of 100mm*160mm in size.
Two PCBs are identical and contain 6bits of the accumulator and ALU
(shift and logic functions only) each. The third board is labeled
"function decode" and this contains the rest of the ALU (12 bit adder,
subtracter, zero-detect) and the address generator. Data flow etc. is
controlled by 6 PROMS on this PCB.
So the content of these PROMS contains what I call microcode,
i.e. the bitpatterns and the timing sequence required to make the
processor work and the complicated multiply-insttuction lasting for many
cycles originates there, too.
Since these 32-nibble-PROMS with open collector output are soldered
to this multilayer (YES: MULTILAYER) PCB, where the vias are made by
some rivets, I did not have the heart to unsolder them for readout.
Apart from this I do not have got a reader for them.
Of course I considered connecting the logic analyzer to the PROMS and
record their contents during operation. But due to the interconnection
of the open collector outputs it would be difficult to judge wich of
the PROMS is pulling the pin to low.
So currently I am still at risk, that there is (a) a defective PROM
responsible for the freezing phenomenon and that (b) I will lose the
unit if I kill one of the PROMS. But that is life.
Thanks and best regards,
Erik.