On Saturday 13 May 2006 06:14 am, Pete Turnbull wrote:
On May 13 2006, 9:32, Jochen Kunz wrote:
On Fri, 12 May 2006 23:21:10 +0200
Gerhard Lenerz <mail at g-lenerz.de> wrote:
No need for ECC RAM
ECC == parity? I always thought the SGI machines need ECC / parity
RAM.
(I.e. SIMMS with 36 data bits.)
ECC != parity.
Parity uses a single bit (in the case of 36-bit SIMMs, one bit per
byte) to detect single-bit errors. It will tell you a byte is wrong,
but won't tell you which bit, so it provides no correction capability.
It will not detect two-bit errors.
ECC stands for error correction code, and is a multi-bit arrangement
capable of not only detecting errors but providing enough information
to correct some of them. How much it detects and provides correction
for, depends on how many bits and how they're organised.
Speaking of which, I have a couple of uses for those, one being a
"Digital" (DEC?) 486 box that will apparently only see parity RAM, and which
at present has a couple of 16s and a couple of 4s in there giving me 40M,
and which I'd like to take up to 64M. The other is a DPT SCSI card that'll
take up to 4 16s, and I have 4 in there, but it'll use parity RAM and I
*think* ECC RAM also (I'd have to pull it out to check), and I'd much rather
have that as cache there if possible, that being what it is.
Anybody have some they might want to trade for? Feel free to contact me
offlist...
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Member of the toughest, meanest, deadliest, most unrelenting -- and
ablest -- form of life in this section of space, a critter that can
be killed but can't be tamed. --Robert A. Heinlein, "The Puppet Masters"
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