26 Jul
2014
26 Jul
'14
7:36 a.m.
..and a nod to general t-shooting theory..
Is he able to reproduce the problem freely, under any set of otherwise sane
conditions? Does the instruction apparently misbehave no mater how & when
it's called, wherever it resides in memory, when called before/after any
other instruction, and so on?
Need to be sure you're not confusing an artifact, or some special
condition, with a more generalized (mis)behavior.
On Sat, Jul 26, 2014 at 8:55 AM, dwight <dkelvey at hotmail.com> wrote:
Date: Sat, 26 Jul 2014 17:53:56 +0930
From: thrashbarg at kaput.homeunix.org
To:
Subject: Z80 CPU bugs?
Hello List,
I've been developing my own Z80 SBC kit computer (who hasn't?) and have
been debugging CP/M 3 on it. I seem to have come across an interesting
problem with the LDIR instruction which appears on some 10MHz Z80 CPU's
I bought from Farnell, but not on what are probably Chinese fakes which
are supposed to be 20MHz. I'm running the system at 6.75MHz.
The problem is when I execute the LDIR instruction, it writes an
additional zero to memory. Say if I transfer 16 bytes, it'll transfer
them correctly but overwrite the 17th address with a zero.
Does anyone know anything about this? I've looked for a list of
revisions or bug fixes from Zilog but haven't come up with anything.
The Z80's in question are marked:
zilog
Z84C0010PEG
Z80 CPU
1209
Thanks,
Alexis K. Have you carefully checked your SBC for race conditions that
maybe right
on the edge of causing the problem?I'd look there first before
I suspected a problem with the uP.Many of the parts available today are
faster than originalspecifications. This means one can't always ensure
orderly events.Any programmable logic is suspect as well.Dwight