Johnny Billquist wrote:
As for what PDP-11 might have innovated, we have
covered the memory
mapped I/O at some length now, and it appear that the PDP-11 might
atleast have a half claim to fame there. But, as some pointed out, the
x86 do not use memory mapped I/O (and shared memory with a graphics
subsystem is not the same thing). Most RISC machines did/do use memory
mapped I/O anyway, but I digress...
I have not seen anyone comment any of the other things I listed as
possible firsts on the PDP-11.
Can anyone come up with an earlier machine that used condition codes?
How about general registers with addressing modes, which is totally
orthogonal? How about having the PC as a general register?
I don't know of any machines before the PDP-11 that had these.
Admittedly, the only one of these attributes the x86 inherited (from
wherever) is condition codes, but I think it might be interesting to
hear the collective wisdom on some more details than just memory
mapped I/O...
I have followed this thread with interest. It certainly brings up how
original DEC was during its first two decades.
However, I don't think that DEC was unique in that regard since those
years were when a great amount of
innovation took place at many other companies as well.
In answer to Johnny's questions about other hardware which also had the
same capability, I suggest that we
evaluate the CDC STAR-100 and its dwarf brother (IIRC) the PL-50 which
was much slower, but had the
same instruction set. This hardware was mentioned briefly in reference
to its 48-bit virtual address, Note
that the 48-bit address was to the bit level which is equivalent to a
45-bit byte address - which is still far
larger than any physical memory of today. And this was back around
1972. At one point, we calculated
that at ONE MegaByte per second transfer rate (a very high sustained
rate in 1972), it would take ONE year
to write all of virtual memory to a disk drive if there had been a drive
large enough to hold all that data -
about 32 TerraBytes I think. By the way, as a bit of clarification, the
operating system that I worked on
limited the user address space to just 16 TerraBytes since all virtual
addresses with the high order bit set
were dedicated to the operating system.
So obviously the STAR-100 used a virtual address which was far larger
than the available physical memory.
In fact, there was so little physical memory (I seem to remember 2 or 4
MegaBytes of core), most of the time
it was faster to run only a single job as Chuck Guzis mentioned yesterday.
For registers, I seem to remember there were 256. I can't remember how
they were divided or used, but I
think that some registers were 32 bits and other 64 bits. In addition,
the PC register may have been available
along with a status register. For condition codes, I am confident that
the same sort of conditional branching
was available after each scalar instructions as is found on a PDP-11,
but I can't find any of my old manuals to
verify that aspect. Note that the primary attribute of the STAR-100 was
its vector instructions. As a result,
the scalar instructions were probably compromised. However, there was
a full set of scalar instructions
which may have been (in some manner) similar to PDP-11 instructions. I
seem to remember that the
instructions had a variable length as does the PDP-11.
Also, Chuck Guzis mentioned yesterday there was the ability to map
complete files (to a virtual address window)
which could contain either code or data. Normally, the files were data
to be saved on the disk drive where the
permanent record of the file was stored. But the key point is that once
the file was opened and mapped during
the open request to a specified address window, the operating system
took care of reading and writing the
file as and when any particular virtual address was referenced by the
program. I understand that many current
operating systems / hardware which do the same at present?
One rather interesting aspect of the paging algorithm made use of the
hardware stack of pages which were
kept in an LRU (Least Recently Used) order in memory. When the number
of available pages (either completely
free or unaltered) fell below the accepted threshold, an altered page
was written to its disk backup in
anticipation that the page would be the MOST LRU when the time came to
discard that page from physical
memory. Throughput was significantly increased since the required new
page (at a different virtual address)
could be read immediately without having the double wait time due to
writing out an altered MOST LRU page.
If anyone here has access the STAR-100 manuals, that might be the best
way to verify the aspects that Johnny
has mentioned with regard to innovations there were brought out during
the 1970s decade by various companies.
Since the STAR-100 design must have started before 1970, the innovations
would probably not have been
influenced by the PDP-11 and visa versa.
Jerome Fine