Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)

--- Richard Erlacher <edick(a)idcomm.com> wrote: This is slightly before my time, but I was told that the earliest 68000 designs that used DRAMS, used a derivative of the Z-80 scheme because the designers of the time were used to it. I didn't mean to imply that the 68K had some kind of magical in-built DRAM refresh support. The microcode faults I was told about for the XC68000 (not MC68000) would lock things up tight for dozens of clock cycles, then go right back at it, as it nothing ever happened. It was strictly internal to the CPU and caused by bugs in the first run. Your software never knew what hit it unless it was checking timings against an external clock. By the time I personally touched a 68000, these kinks were long worked out (except for knowing that one needs to put low-ohmage resistors (30-60 Ohms) in series with the refresh lines from a DRAM controller when attempting to refresh several dozen DRAMs (4164s in this case). I chuckled when I saw those same resistors in the front memory cartridge of an Amiga 1000. They at least got them in there by the time their production started. I added hundreds of 68 Ohm resistors to the first production run of COMBOARD-II rev 0s. Once one of those came back from the soldering house, I think it took 3 hours of bench time to apply all the ECOs. Good thing they were already expensive. -ethan ===== Visit "The Seventh Continent" http://penguincentral.com/penguincentral.html __________________________________________________ Do You Yahoo!? Get personalized email addresses from Yahoo! Mail http://personal.mail.yahoo.com/