Core Memory Failure Modes

Date: Thu, 3 Oct 2013 15:49:45 -0700 Subject: Core Memory Failure Modes From: derschjo at gmail.com To: cctalk at classiccmp.org Hi all -- Last night I finally got the Imlac working to the point where I can run programs more advanced than a light chaser, and I'm using my newfound abilities to take a closer look at the functionality of the system's core memory. This is a Dataram "DR-101" system (Docs are on Bitsavers now), 8KW of 16-bit words and when I got the Imlac all the socketed ICs on the control PCB were extremely corroded. I outright replaced the corroded ICs (most of them were too far gone to deal with and the rest were marginal) cleaned the sockets, and at this point it's fairly functional. I whipped up a simple program to walk through memory and test every location (by writing / reading back all possible 16-bit values at every location). The results are mostly positive, aside from a small addressing issue (the upper two MSBs of the address from the CPU are apparently being ignored by the memory's addressing logic so I get 2K repeated over and over again). What I did find was that most of the memory I'm currently able to test (the repeated 2K) tests out fine. However, there are a few addresses in the 210-240 address range that either have dead bits or behave sporadically, and there's a single bit near the top of memory that's stuck off. The failures are 100% consistent (even the sporadic failures always show up at the same addresses) and reproduce identically if the system is "cold" or has had time to warm up for awhile. I'm not sure whether to suspect calibration/alignment issues here -- I would expect failures to be more widespread or have repeating patterns of some sort if the system was out of alignment. I'm tending to think that the core plane may actually be damaged in places, which would be very unfortunate. However, I don't have a lot of experience in diagnosing core memory failures; so far I've been fortunate -- the systems I have that use core memory have not had issues with the memory. Anyone with more experience here have any suggestions? Thanks as always (and yes, I'm still working on the 8/L current loop stuff I've just been distracted because apparently I have no attention span and thanks again for all the help there :)), - Josh The address decode is not a problem in the arrays.The bit failures may be.Dwight