18 Dec
2007
18 Dec
'07
2:22 a.m.
The first LSI tester I ever worked on (manufactured by, I think, LSI
Testing Inc of Utah) used triple-66 bit MOS shift registers to store the
digital stimuli and compare patterns (3x64-bit registers plus 2 bits
used as control). Around 1970 or so at Hughes Microelectronics. Since we
manufactured MOS ICs (PMOS at the time) and the shift registers became
obsolete after a few years we designed our own as spares. The tester
itself used a PDP-8/L as the controller and was soon after replaced by a
bigger one which used a PDP8/I - my first contact with SEC PDP8
computers.
regards
Bob Adamson
From: "Rick Bensene" <rickb at
bensene.com>
A lot of early MOS shift registers were developed specifically for use
in electronic calculators, as solid-state replacements for magnetic
core
memory or magnetostrictive delay lines. Since most
all electronic
calculators in the mid-'60's through the late 70's operated in BCD or
some alternate four (or sometimes five)-bit representation of decimal
digits, the shift registers were usually made with a number of stages
that was a multiple of four or five, with a few extra bits here and
there for timing and synchronization. That's why many of these
devices
as an unusual number of stages. In some calculators
from the late
'60's, as IC logic had pretty much replaced discrete transistor
designs,
there were different versions of the same machine,
earlier machines
which used a magnetostrictive delay line, and "updated" versions which
dispensed with the delay line, and replaced it with a number of MOS IC
shift register devices. Functionally, the machines were identical. As
far as the digital logic section of the machine went, also identical.
The only real changes were the removal of the read amplifier and write
driver for the delay line, and replacement with some simple
level-shifting and power supply circuitry to properly drive the shift
register chain.
Rick Bensene
The Old Calculator Museum
http://oldcalculatormuseum.com