Subject: Re: OMTI parallel port interface hack
From: ard at p850ug1.demon.co.uk (Tony Duell)
Date: Sat, 08 Jul 2006 22:44:30 +0100 (BST)
To: cctalk at
classiccmp.org
The
problem is that the 8255 is fundamnetally broken as designed (well,
I'd expect that from Intel, alas). Any write to the mode control register
clears all outputs to 0's. Which means you can't reverse the direstion of
one of the 8 bit ports without mucking up everything else.
Oh really? I've never heard _that_ before about these parts... Do you know
It is mentioned in the Intel 8255 data sheet.
> offhand if that's the case for other brands as well? I believe I have some
> NEC parts around somewhere.
It applies to ALL 8255s. For some uses this is not a problem, others just
plain annoying. All a side effect of putting 10# in a 5# bag if you ask me.
However of all the parallel devices it's widely available (even in CMOS)
and despite it's flaws it's still more versitile than any other PPI.
An alternate if the application can tolerate it's interface is the 8155
(22 IO lines and 8085/8088 muxed data/address interface).
It certainly applies to the National Semiconductor
version. I used one in
my first Z80 homebrew, and one of the first programs I wrote once I'd
added it simply configured all ports as outputs, wrote a suitable value
to port A, then jumped back to the start. I then found the lines that
should be high were, in fact, pulsing. Reading the data sheet showed why
(I was re-loading the mode control register, thus clearing the output
ports). Of course it was trivial to correct in this program, but it sure
made life difficult later.
Once you know this it's less a problem. Hint: if you invert the outputs
and add pullups you can hide the problem for some cases.
For many apps it's not a problem. The upside is 24 IO lines. Or two
ports with full handshake and interrupt posting. No so bad really.
For some cases using the 8255 is way overkill and a LS273 was more
suitable but then I'm barking at the design of others.
Allison
-tony